Analyzing path delays for accelerated testing of logic chips
Emily Ray, Barry P. Linder, et al.
IRPS 2015
Light emission due to off-state leakage current (LEOSLC) has become an intense source of light, comparable to hot carrier emission, making it a useful method for testing chips. Increase in leakage current and voltage difference increases the LEOSLC, which enables the detection of voltage, temperature variations, and the logic state of the gates. This method provides a very high resolution, and is especially useful when diagnosing a fault that resides in a scan clock tree, which is hard to diagnose using conventional method. The application of this method in diagnostics could become easier and more frequent as the leakage becomes larger with the evolving technologies.
Emily Ray, Barry P. Linder, et al.
IRPS 2015
Franco Stellari, Peilin Song, et al.
ISTFA 2011
Peilin Song, Franco Stellari, et al.
IEEE ITC 2014
Peilin Song, Franco Stellari, et al.
ISTFA 2004