About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
Solid-State Electronics
Paper
CMOS compatible self-aligned S/D regions for implant-free InGaAs MOSFETs
Abstract
CMOS compatible self-aligned access regions for indium gallium arsenide (In 0.53Ga 0.47As) implant-free n-type metal-oxide- semiconductor field effect transistors (MOSFETs) are investigated. In situ doped n+ source/drain regions are selectively grown by metal-organic vapor phase epitaxy and self-aligned Nickel-InGaAs alloyed metal contacts are obtained using a self-aligned silicide-like process, where different process conditions are studied. Soft pre-epitaxy cleaning is followed by X-ray photoelectron spectroscopy, while the Ni-InGaAs/III-V interface is characterized by back-side SIMS profiling. Relevant contact and sheet resistances are measured and integration issues are highlighted. Gate-first implant-free self-aligned n-MOSFETs are produced to quantify the impact of Ni-InGaAs contacts on the device performance. © 2012 Elsevier Ltd. All rights reserved.