CIRCUIT PERFORMANCE OF GaAlAs/GaAs HETEROSTRUCTURE BIPOLAR JUNCTION TRANSISTORS.

Abstract

A theoretical evaluation is presented of the performance of heterostructure bipolar junction transistors (HBT, GaAlAs/GaAs system) in emitter-coupled logic (ECL) and Schottky transistor logic (STL) circuits under loaded and unloaded conditions in order to obtain a comparison for large circuit applications and in order to understand their limiting features. Under loaded conditions, for 1- mu m minimum rules, ECL circuits show less than 60-ps delay at 4-mW/gate dissipation while STL circuits show less than 150-ps delay at 0. 4-mW/gate dissipation. Circuits are limited by transition capacitances and resistances. Diffusion capacitances are minimal in heterostructures at nominal current densities below 1 multiplied by 10**5 A/cm**2 . STL circuits, when driven at higher power, show delays of 50 to 65 ps at 1. 2-mW/gate dissipation. This is comparable to ECL performance and will be limited by the quality of Schottky diodes that can be made on compound semiconductors.