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Publication
IEEE Journal of Solid-State Circuits
Paper
A 4-Mb Low-Temperature DRAM
Abstract
This paper presents the characterization of the first DRAM fabricated in a technology specifically optimized for cryogenic operation. With the power supply adjusted to assure hot-electron reliability, the 25-ns 4-Mb low-temperature (LT) chips operated 3 x faster than conventional chips. The LT-opti-mized chips functioned properly with cycle times as fast as 45 ns, and with a toggle-mode data rate of 667 Mb/s. Wide operating margins and a very large process window for data retention were demonstrated; at a temperature of 85 K the storage retention time of the trench-capacitor memory cells exceeded 8 h. This work shows that the performance leverage offered by low temperature applies equally well to DRAM as it does to logic; there is no limitation inherent to memory. © 1991 IEEE