A 1.9GHz 0.57V Vmin 576Kb Embedded Product-Ready L2 Cache in 5nm FinFET Technology

Abstract

A product-ready L2 cache (L2C) design based on 6T ultra-dense SRAM cells with novel circuits capable of boosting wordline, cell, and, and bitline supplies independently using single supply and metal coupling capacitance is demonstrated for the first time in 5nm technology. A metal short detection circuit is provided to increase the robustness of the design. Hardware data shows that L2C operates with a minimum supply of 0.57V and reaches a maximum operating frequency of 1.9GHz at 1.1V.