660 MHz self-resetting 8 port, 32×64 bits register file and latch in 0.25 μm SOI technology

Abstract

A register file and latch for bulk silicon technology was fabricated using SOI technology without any body contacts. The register file and latch function at frequencies higher than 660 MHz. The salient features are operability at low voltage, fully collision-free operation and minimum noise. A robust design is demonstrated with respect to input pulse width variation and skew margins. Charge sharing noise and noise due to leakage coupling and power supply variations are controlled using half latches on the dynamic nodes and property optimizing circuits and layouts.