Acceleration-As-A-μService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs
- 2021
- CLOUD 2021
Raphael Polig
Title
Staff Research Scientist
Bio
I am a Staff Research Scientist at the Cloud & AI Systems Research department of IBM Research Zurich. My recent work revolves around hardware security modules (HSMs) and their secure and scalable deployment in Cloud environments. For my work I touch the "full stack", from FPGA prototyping, on-card firmware, host application and management software development, to Kubernetes deployments.
I recieved my Dipl.-Ing. and PhD degrees in electrical engineering and information technology from the Technische Universitaet Muenchen, Munich, Germany, in 2008 and 2015 respectively. I have published more than 50 patents and publications, with best paper award nominations at ASAP conference 2014 and FPL conference 2016. Since 2017 I am a senior member of the IEEE.
Publications
FPGA Accelerated Analysis of Boolean Gene Regulatory Networks
- 2019
- IEEE/ACM TCBB
A hardware compilation framework for text analytics queries
- Raphael Polig
- Kubilay Atasu
- et al.
- 2018
- JPDC
Accelerated analysis of Boolean gene regulatory networks
- Mitra Purandare
- Raphael Polig
- et al.
- 2017
- FPL 2017
Formal Techniques for Effective Co-verification of Hardware/Software Co-designs
- Rajdeep Mukherjee
- Mitra Purandare
- et al.
- 2017
- DAC 2017
Network-attached FPGAs for data center applications
- Jagath Weerasinghe
- Raphael Polig
- et al.
- 2016
- FPT 2016
A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware
- C.M. Angerer
- Raphael Polig
- et al.
- 2016
- SUSCOM
Energy-efficient stochastic matrix function estimator for graph analytics on FPGA
- Heiner Giefers
- Peter Staar
- et al.
- 2016
- FPL 2016
Annotation-based finite-state transducers on reconfigurable devices
- Raphael Polig
- Kubilay Atasu
- et al.
- 2016
- FPL 2016
Measuring and Modeling the Power Consumption of Energy-Efficient FPGA Coprocessors for GEMM and FFT
- Heiner Giefers
- Raphael Polig
- et al.
- 2015
- Journal of Signal Processing Systems
Patents
- US
- 11907828
- JP
- 7358005
- US
- 11521705
- US
- 11515005
- GB
- 2595994
- US
- 11275713
- US
- 11150926
- US
- 10970449
- US
- 10803346
- US
- 10776118
Projects
Top collaborators
CH
Christoph Hagleitner
Senior Research Scientist
FA
Francois Abel
Senior Research Scientist
MM
Matteo Manica
Senior Research Scientist
PS
Peter Staar
Principal RSM; Master Inventor; Manager of `AI for Knowledge` group.