Francois Abel

I'm a research staff member in the Hybrid Cloud Research department of the IBM Zurich Research Laboratory (Switzerland), which I joined in 1997.

My area of research is high-speed networking, with an emphasis on architecture and systems design of server interconnect fabrics and accelerators for computer interconnection networks. I received a Dipl.-Eng. degree from the Ecole Nationale d’Ingénieurs  (now UTBM), Belfort, France, and a Master's in microelectronics from the Institut Supérieur de Microélectronique Appliquée (now EMSE-ISMIN), Marseille, France.

What keeps me busy ?

Right now, I am enrolled in a full-time learning program called “Software Engineering for Scientists" until the end of 2023. The goal of this training is to develop new transversal skills in the fields of Cloud Engineering, Data Engineering, Machine Learning and Data Science, in order to have a greater impact on the business growth.

Previous research projects

Cloud and computing infrastructures

[2023-today] Tape research - Developing software that ease the use and scaling of tapes in data centers

[2021-2022] Everest - dEsign enVironmEnt foR Extreme-Scale big data analyTics on heterogeneous platforms

• EVEREST is an European project funded by the Horizon 2020 Program for research and innovation.
• The aim of the project is to develop a design environment to simplify the implementation of Big Data applications on FPGA-based platforms.

   [2016-2021] cloudFPGA - Field programmable gate arrays for the cloud

• cloudFPGA is a disaggregated cloud and computing infrastructure based on standalone network-attached FPGAs. The goal of this project is to deploy FPGAs at large scale in data centers.
• An open-source development kit, named cFDK, enables developers to deploy FPGA-based compute kernel accelerators within minutes.
• The platform is hosted in the Cloud and is shared with other researchers around the world.

   [2014-2015] Enabling FPGAs in Hyperscale Data Centers

Hardware accelerator techniques and their applications

   [2008-2013] Rx Stack Accelerator for 10 GbE Integrated NIC

Optical Packet Switch

   [2004-2007] The OSMOSIS research project

High-Speed Electronic Packet Switches

   [2000-03] Prizma - Distributed Packet Routing Switch Architecture

   [1999-00] IBM PowerPRS (64 Gb/s ASIC Switch Chip ()

   [1998-99] Network Processor Load Balancing for High-Speed Links

   [1997-98] IBM PowerPRS (32 Gb/s ASIC Switch Chip)

Former Life

Before joining IBM in 1997, I was a hardware engineer at Telmat Informatique, where I designed architectures and electronic boards for Unix multiprocessor servers and Transputer-based parallel supercomputers.

During that period I participated in several European projects in which I conducted research in the fields of real-time 3-D graphics (The Spirit Workstation) and Transputer-based networking (Supernode).

Awards

• IBM Invention Achievement Award, Third Plateau, January 2006.
• Best Paper Award, IEEE HOT Interconnects 13, Stanford, CA, August 2005.
• IBM Research Division Award, For 2002 Communication Systems publication, June 2003.
• IBM Invention Achievement Award, Second Plateau, August 2002.
• IBM Invention Achievement Award, First Plateau, April 2002.
• IBM Research Division Award, For contributions to the PRIZMA-EP Switch Chip verification, November 2001.
• IBM Research Division Award, For contributions to the PRIZMA Atlantic Switch, May 1999.