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Self-aligned blocking integration demonstration for critical sub-30nm pitch Mx level patterning with EUV self-aligned double patterningAngelique RaleyJoe Leeet al.2018SPIE Advanced Lithography 2018
Defect detection strategies and process partitioning for SE EUV patterningLuciana MeliKaren Petrilloet al.2018SPIE Advanced Lithography 2018
The integration of 193i and DSA for BEOL metal cuts/blocks targeting sub-20nm tip-to-tip CDChi-Chun LiuYann Mignotet al.2018SPIE Advanced Lithography 2018
Detection of Printable EUV Mask Absorber Defects and Defect Adders by Full Chip Optical Inspection of EUV Patterned WafersLuciana MeliRavi Bonamet al.2017IEEE Trans Semicond Manuf
Development of amorphous silicon based EUV hardmasks through physical vapor depositionAnuja De SilvaYann Mignotet al.2017SPIE Photomask Technology + EUV Lithography 2017
Coater/developer based techniques to improve high-resolution EUV patterning defectivityKoichi HontakeLior Huliet al.2017SPIE Photomask Technology + EUV Lithography 2017
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFETN. LoubetT.B. Hooket al.2017VLSI Technology 2017
Ultrathin extreme ultraviolet patterning stack using polymer brush as an adhesion promotion layerIndira SeshadriAnuja De Silvaet al.2017J. Micro/Nanolithogr. MEMS MOEMS
Development of TiO2 containing hardmasks through plasma-enhanced atomic layer depositionAnuja De SilvaIndira Seshadriet al.2017J. Micro/Nanolithogr. MEMS MOEMS
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MBMary BretonTechnical Assistant to Huiming Bu | Semiconductor Enablement Program Management & Infrastructure