A 40 GS/s 8b-DAC SST-TX in 7 nm FinFET CMOS for cryogenic quantum applications with 32kB SRAM-based RF-DDS AWG

Abstract

An 8b digital-to-analog converter (DAC) based transmitter (TX) in 7 nm CMOS for cryogenic quantum applications is presented. It operates at up to 40GS/s using pushpull output stages with polysilicon resistors (peres) and employs an A/B weighting concept within the DAC output stages for area and clock load reduction. A 32 kB static random-access memory (SRAM) is included for direct radio frequency (RF) arbitrary waveform generation (AWG) as well as a sequencer state machine that performs replays with arbitrary sequence length. The DAC is tailored for integrated qubit control signal generation at the 4 K stage of a cryostat, and includes an external trigger to synchronize multiple DAC TXs. We demonstrate the operation of the circuitry, with a total area of 0.1 $mm^2$ and efficiency of 3.2 pJ/b, down to a temperature of 4 K. The work represents one of the smallest footprint cryogenic controllers with on-chip memory realized to date.