Analog Resistive Switching in BEOL, Ferroelectric Synaptic Weights
- Laura Begon-Lours
- Mattia Halter
- et al.
- 2021
- IEEE J-EDS
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Junction Design and Complementary Capacitance Matching for NCFET CMOS Logic
- Reinaldo A. Vega
- Takashi Ando
- et al.
- 2021
- IEEE J-EDS
Comparison of LER induced mismatch in NWFET and NSFET for 5-nm CMOS
- Chandan Kumar Jha
- Pritam Yogi
- et al.
- 2020
- IEEE J-EDS
Monolithically Integrated Catalyst-Free High Aspect Ratio InAs-on-Insulator (InAsOI) FinFETs for pH Sensing
- Maneesha Rupakula
- Junrui Zhang
- et al.
- 2020
- IEEE J-EDS
InGaAs FinFETs 3-D Sequentially Integrated on FDSOI Si CMOS with Record Performance
- Clarissa Convertino
- C. B. Zota
- et al.
- 2019
- IEEE J-EDS
Top-bottom gate coupling effect on low frequency noise in a schottky junction gated silicon nanowire field-effect transistor
- Xi Chen
- Si Chen
- et al.
- 2019
- IEEE J-EDS
A Low-Power Thin-Film Si Heterojunction FET Noise Amplifier for Generation of True Random Numbers
- Bahman Hekmatshoar
- Ghavam Shahidi
- 2019
- IEEE J-EDS
InGaAs Capacitor-Less DRAM Cells TCAD Demonstration
- Carlos Navarro
- Santiago Navarro
- et al.
- 2018
- IEEE J-EDS
Advanced FDSOI Device Design: The U-Channel Device for 7 nm Node and beyond
- Ramachandran Muralidhar
- Robert Dennard
- et al.
- 2018
- IEEE J-EDS
Bidirectional Non-Filamentary RRAM as an Analog Neuromorphic Synapse, Part II: Impact of Al/Mo/Pr0.7Ca0.3MnO3 Device Characteristics on Neural Network Training Accuracy
- Alessandro Fumarola
- S. Sidler
- et al.
- 2018
- IEEE J-EDS