22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
- S. Narasimha
- P. Chang
- et al.
- 2012
- IEDM 2012
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18 results for Alan Thomas
65nm CMOS technology for low power applications
- A. Steegen
- R. Mo
- et al.
- 2005
- IEDM 2005
Scalable low power vertical memory
- H.I. Hanafi
- S. Tiwari
- et al.
- 1995
- IEDM 1995
Enabling reverse tone imaging for via levels using attenuated Phase Shift Mask and source optimization
- Bassem Hamieh
- Hyun Chol Choi
- et al.
- 2013
- SPIE Advanced Lithography 2013
High performance bulk planar 20nm CMOS technology for low power mobile applications
- Huiling Shang
- Sameer Jain
- et al.
- 2012
- VLSI Technology 2012
Strategies for single patterning of contacts for 32nm and 28nm technology
- Bradley Morgenfeld
- Ian Stobert
- et al.
- 2011
- ASMC 2011
Contact patterning strategies for 32nm and 28nm technology
- Bradley Morgenfeld
- Ian Stobert
- et al.
- 2011
- SPIE Advanced Lithography 2011
Competitive and cost effective copper/low-k interconnect (BEOL) for 28nm CMOS technologies
- Rod Augur
- Craig Child
- et al.
- 2010
- ADMETA 2010
Improving the power-performance of multicore processors through optimization of lithography and thermal processing
- A. Gabor
- T.A. Brunner
- et al.
- 2007
- SPIE Advanced Lithography 2007
Approach to pattern aspect ratio control
- A. Thomas
- Franz Zach
- et al.
- 1999
- SPIE Advanced Lithography 1999