Publications

This is our catalog of publications authored by IBM researchers, in collaboration with the global research community. It’s an ever-growing body of work that shows why IBM is one of the most important contributors to modern computing.

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7 results for T. Wu

Subtractive Ru Interconnect Enabled by Novel Patterning Solution for EUV Double Patterning and TopVia with Embedded Airgap Integration for Post Cu Interconnect Scaling
- - C. J. Penny
  - Koichi Motoyama
  - et al.
- 2022
- IEDM 2022
Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices
- - H. Jagannathan
  - B. Anderson
  - et al.
- 2021
- IEDM 2021
High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
- - K. Cheng
  - A. Khakifirooz
  - et al.
- 2012
- IEDM 2012
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- - N. Loubet
  - T.B. Hook
  - et al.
- 2017
- VLSI Technology 2017
Bottom oxidation through STI (BOTS) - A novel approach to fabricate dielectric isolated FinFETs on bulk substrates
- - K. Cheng
  - S.-C. Seo
  - et al.
- 2014
- VLSI Technology 2014
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm² SRAM cell
- - Kangguo Cheng
  - A. Khakifirooz
  - et al.
- 2011
- VLSI Technology 2011
ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm² SRAM cell
- - Kangguo Cheng
  - A. Khakifirooz
  - et al.
- 2011
- VLSI Circuits 2011