High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling
- S. Bangsaruntip
- G.M. Cohen
- et al.
- 2009
- IEDM 2009
Publications
Date
Featured collections
Popular topics
63 results for Michael Guillorn
Trigate 6T SRAM scaling to 0.06 μm2
- M. Guillorn
- J. Chang
- et al.
- 2009
- IEDM 2009
Demonstration of highly scaled FinFET SRAM cells with high-Κ/metal gate and investigation of characteristic variability for the 32 nm node and beyond
- H. Kawasaki
- M. Khater
- et al.
- 2008
- IEDM 2008
A 7-nm Four-Core Mixed-Precision AI Chip with 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
- Sae Kyu Lee
- Ankur Agrawal
- et al.
- 2021
- IEEE JSSC
Two-dimensional pattern formation using graphoepitaxy of PS-b-PMMA block copolymers for advanced FinFET device and circuit fabrication
- Hsinyu Tsai
- Jed W. Pitera
- et al.
- 2014
- ACS Nano
Dopant-segregation technique for leakage reduction and performance improvement in trigate transistors without raised source/drain epitaxy
- Fei Liu
- Zhen Zhang
- et al.
- 2014
- IEEE Electron Device Letters
Ultra low contact resistivities for CMOS beyond 10-nm node
- Zhen Zhang
- Siyuranga Obasa Koswatta
- et al.
- 2013
- IEEE Electron Device Letters
Sharp reduction of contact resistivities by effective schottky barrier lowering with silicides as diffusion sources
- Zhen Zhang
- F. Pagette
- et al.
- 2010
- IEEE Electron Device Letters
High-κ/metal-gate fully depleted SOI CMOS with single-silicide schottky source/drain with sub-30-nm gate length
- Marwan H. Khater
- Zhen Zhang
- et al.
- 2010
- IEEE Electron Device Letters
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
- Jinwook Oh
- Sae Kyu Lee
- et al.
- 2020
- VLSI Circuits 2020