Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
We demonstrate a process flow for creating gate-all-around (GAA) Si nanowire (SiNW) MOSFETs with minimal deviation from conventional replacement metal gate (RMG) finFET technology as used in high-volume manufacturing. Using this technique, we demonstrate the highest DC performance shown for GAA SiNW MOSFETs at sub-100 nm gate pitch, and functional high-speed ring oscillators.
Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
Yoshinori Tsuchiya, Nathaniel Berliner, et al.
IEDM 2010
Curtis Durfee, Subhadeep Kal, et al.
ECS Meeting 2021
Ruqiang Bao, Reinaldo A. Vega, et al.
IEDM 2019