IBM POWER8 circuit design and energy optimization
- Victor Zyuban
- Joshua Friedrich
- et al.
- 2015
- IBM J. Res. Dev
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Power optimization methodology for the IBM POWER7 microprocessor
- Victor V. Zyuban
- Joshua Friedrich
- et al.
- 2011
- IBM J. Res. Dev
A sub-600-mV, fluctuation tolerant 65-nm CMOS SRAM array with dynamic cell biasing
- Azeez J. Bhavnagarwala
- Stephen Kosonocky
- et al.
- 2008
- IEEE Journal of Solid-State Circuits