Development of vacuum underfill technology for a 3D chip stack
- Katsuyuki Sakuma
- Sayuri Kohara
- et al.
- 2011
- JMM
Paper
Publications
64 results for Katsuyuki Sakuma
IMC bonding for 3D interconnection
- Katsuyuki Sakuma
- Kuniaki Sueoka
- et al.
- 2010
- ECTC 2010
Conference paperEffects of vacuum ultraviolet surface treatment on the bonding interconnections for flip chip and 3-D integration
- Katsuyuki Sakuma
- Jun Mizuno
- et al.
- 2010
- IEEE Transactions on Electronics Packaging Manufacturing
PaperEffects of excimer irradiation treatment on thermocompression Au-Au bonding
- Naoko Unami
- Katsuyuki Sakuma
- et al.
- 2010
- Japanese Journal of Applied Physics
PaperDie-to-wafer 3D integration technology for high yield and throughput
- Katsuyuki Sakuma
- Paul S. Andry
- et al.
- 2008
- MRS Fall Meeting 2008
Conference paperVacuum ultraviolet (VUV) surface treatment process for flip chip and 3-D interconnections
- K. Sakuma
- N. Nagai
- et al.
- 2009
- ECTC 2009
Conference paperSimplified 20-μm pitch vertical interconnection process for 3D chip stacking
- Katsuyuki Sakuma
- Noriyasu Nagai
- et al.
- 2009
- IEEJ Transactions on Electrical and Electronic Engineering
Paper3D silicon integration
- J. Knickerbocker
- P. Andry
- et al.
- 2008
- ECTC 2008
Conference paperCharacterization of stacked die using die-to-wafer integration for high yield and throughput
- K. Sakuma
- P. Andry
- et al.
- 2008
- ECTC 2008
Conference paper3D chip stacking with C4 technology
- Bing Dang
- Steven L. Wright
- et al.
- 2008
- IBM J. Res. Dev
Paper