About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Design and implementation of high performance dynamic 64-bit parallel adder with enhanced testability
- W. Hwang
- G.D. Gristede
- et al.
- 1998
- CICC 1998