This paper describes a machine vision technique and associated system (the P300) for automated inspection of integrated circuit chips on multi-level patterned wafers for pattern defects and particulates. This inspection has been variously referred to as "micro," "first optical," and just "defect inspection." Despite the fact that this inspection is primarily performed manually today, the effectiveness of manual inspection is marginal-especially for products requiring the detection of sub-micron defects. In the future, on smaller groundrule products, manual inspection will clearly become inadequate. The system described here performs this inspection on periodic patterns such as those found in memory and CCD arrays. It has been shown effective for inspecting a broad range of production wafers. A description of the problem and a survey of previous work are presented. Following these, the P300 system and associated image analysis algorithms are described. The image analysis technique consists of a reference comparison combined with certain devices (gated operators and statistical sampling) designed to significantly reduce false alarms with minimal reduction in detection probability. The current version of the system has demonstrated the ability to reliably find 0.5 μm defects and can be extended to smaller defect sizes. The technique is especially significant because of its high detection probability achieved at an extremely low false alarm rate. High throughput and low cost have been achieved due to both the unique algorithm and a custom parallel processor, which executes the inspection algorithm at high (video frame rate) throughput. © 1988 Springer-Verlag New York Inc.