Conference paper
ON THE IMPURITY PROFILES OF DOWN SCALED BIPOLAR TRANSISTORS.
D.D. Tang, G.P. Li, et al.
IEDM 1985
A self-aligned I2 L/MTL technology featuring collectors doped from and contacted by polysilicon, self-aligned collector and base contact edges, and metal-interconnected bases is described. Experimental ring-oscillator circuits designed with 2.5 -μm design rules and fabricated with this technology exhibit gate delays as small as 0.8 ns at Ic –100 μA for fan-in = I and fan-out = 3. Increased wiring flexibility and improved circuit density are inherent advantages of this self-aligned technology. Copyright © 1980 by The Institute of Electrical and Electronics Engineers, Inc.
D.D. Tang, G.P. Li, et al.
IEDM 1985
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Applied Physics Letters
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IEDM 2008