Publication
IBM J. Res. Dev
Paper

Solutions to IBM POWER8 verification challenges

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Abstract

This paper describes methods and techniques used to verify the POWER8™ microprocessor. The base concepts for the functional verification are those that have been already used in POWER7® processor verification. However, the POWER8 design point provided multiple new challenges that required innovative solutions. With approximately three times the number of transistors available, compared to the POWER7 processor chip, functionality was added by putting additional enhanced cores on-chip and by developing new features that intrinsically require more software interaction. The examples given in this paper demonstrate how new tools and the continuous improvement of existing methods addressed these verification challenges.

Date

01 Jan 2015

Publication

IBM J. Res. Dev

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