Joy Y. Cheng, Daniel P. Sanders, et al.
SPIE Advanced Lithography 2008
Noise and isolation play a crucial role in the design and integration of telecommunications circuits. This work explores noise considerations for integrated design, including NPN and CMOS broadband and 1/f noise and the efficacy of available isolation strategies. We illustrate these issues using new data from IBM's 120 GHz, 0.18 μm SiGe BiCMOS featuring 0.4 and 0.6 dB noise figures at 3 and 10 GHz.
Joy Y. Cheng, Daniel P. Sanders, et al.
SPIE Advanced Lithography 2008
S.F. Fan, W.B. Yun, et al.
Proceedings of SPIE 1989
R.J. Gambino, N.R. Stemple, et al.
Journal of Physics and Chemistry of Solids
Daniel J. Coady, Amanda C. Engler, et al.
ACS Macro Letters