Mapping of Electrostatic Potential in Deep Submicron CMOS Devices by Electron Holography

Abstract

Quantitative two-dimensional maps of electrostatic potential in device structures are obtained using off-axis electron holography with a spatial resolution of 6 nm and a sensitivity of 0.17 V. Estimates of junction depth and variation in electrostatic potential obtained by electron holography, process simulation, and secondary ion mass spectroscopy show close agreement. Measurement artifacts due to sample charging and surface “dead layers” do not need to be considered provided that proper care is taken with sample preparation. The results demonstrate that electron holography could become an effective method for quantitative 2D analysis of dopant diffusion in deep-submicron devices. © 2002 The American Physical Society.