Jan-Ming Ho, G. Vijayan, et al.
Integration, the VLSI Journal
The problem considered is that of producing a legal floorplan that respects a given topological constraint set. The floorplanning approach described is targeted for multilayer sea-of-cells based designs. Therefore it is assumed that no channel separations are required between the blocks. The approach can be generalized to incorporate channel separations.
Jan-Ming Ho, G. Vijayan, et al.
Integration, the VLSI Journal
R.S. Tsay, Juergen Koehl
DAC 1991
R.S. Tsay, S.C. Chang, et al.
Annual ASIC Conference and Exhibit 1992
Ananth V. Iyer, H.Donald Ratliff, et al.
Information Processing Letters