S.M. Sadjadi, S. Chen, et al.
TAPIA 2009
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
S.M. Sadjadi, S. Chen, et al.
TAPIA 2009
Ruixiong Tian, Zhe Xiang, et al.
Qinghua Daxue Xuebao/Journal of Tsinghua University
Pradip Bose
VTS 1998
Reena Elangovan, Shubham Jain, et al.
ACM TODAES