Rafae Bhatti, Elisa Bertino, et al.
Communications of the ACM
Several illustrations of a general technique called the Algorithm and Architecture approach was presented. The programmer controlled unrolling of loops was demonstrated equivalent to customized vectorization of RISC-type code. Its use was illustrated to show that RS/6000 processors could compute the distribution (-1, 1) at the rate of 3.25 multiply-adds. A linear congruential generators, related to the multiplicative congruential generators was also specified.
Rafae Bhatti, Elisa Bertino, et al.
Communications of the ACM
Frank R. Libsch, S.C. Lien
IBM J. Res. Dev
Xiaozhu Kang, Hui Zhang, et al.
ICWS 2008
Arun Viswanathan, Nancy Feldman, et al.
IEEE Communications Magazine