Energy-delay optimization of the STT MRAM write operation under process variations

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Due to an inherently high write current, spin-transfer torque magnetic random access memories suffer from high write time/energy. Typical write schemes using voltage sources aggravate write time/energy due to the source degeneration of the access transistor and high sensitivity to the process variations. In this paper, we propose a new write technique that uses "current sources" to mitigate the impact of process variations on the switching performance compared to "voltage sources." Using current sources for write, we determine the optimal biasing conditions that minimize write energy or write energy-delay product (EDP). However, the optimal biasing conditions are different for "0"→"1" and "1"→"0" transition, and hence, we propose a two-step write. Writing an entire word in a memory array involves certain bit-cells being written "1" ("0"→"1") and other bit-cells written "0" ("1"→"0"), if redundant writes ("0"→"0" and "1"→ "1") are ignored. As the first step of write, the bit-cells that require "0" to be written are suitably biased for low energy or low EDP, while the bit-cells requiring "0"→"1" transition are turned OFF (i.e., don't care bit-cells during step 1). In step 2, the bit-cells requiring "1" to be written are biased for low energy or low EDP (cells requiring "1"→"0" transition are don't care bit-cells during step 2). The proposed write results in the reduction of switching time by 52% and write energy by 73% compared to the typical one-step write based on voltage sources. © 2002-2012 IEEE.


01 Jul 2014