Modelling NEM relays for digital circuit applications
Sunil Rana, Tian Qin, et al.
ISCAS 2013
A growing number of applications rely on fast pattern matching to scan data in real-time for security and analytics purposes. The RegX accelerator in the IBM Power Edge of Network (PowerEN) processor supports these applications using a combination of fast programmable state machines and simple processing units to scan data streams against thousands of regular-expression patterns at state-of-the-art Ethernet link speeds. RegX employs a special rule cache and includes several new micro-architectural features that enable various instruction dispatch and execution options for the processing units. The architecture applies RISC philosophy to special-purpose computing: hardware provides fast, simple primitives, typically performed in a single cycle, which are exploited by an intelligent compiler and system software for high performance. This approach provides the flexibility required to achieve good performance across a wide range of workloads. As implemented in the PowerEN processor, the accelerator achieves a theoretical peak scan rate of 73.6 Gbit/s, and a measured scan rate of about 15 to 40 Gbit/s for typical intrusion detection workloads. © 2012 IEEE.
Sunil Rana, Tian Qin, et al.
ISCAS 2013
Jan Van Lunteren, Ronald Luijten, et al.
DATE 2019
Jonathan Rohrer, Kubilay Atasu, et al.
CODES+ISSS 2009
Raphael Polig, Kubilay Atasu, et al.
IEEE Micro