With the evolution of modern verification methodologies, system-level verification using constrained-random stimulus is a high priority, especially in very large communication applications. A key goal to address is providing fast, effective test coverage. In this paper, we propose a novel method to achieve this goal using a genetic algorithm. First, we present background information about coverage-driven verification methodology, as well as the basic concept and process of the genetic algorithm. Next, we discuss the details of the novel method for integrating this algorithm into a practical verification process. Thereafter, we introduce a simple simulation platform coded in C for benchmarking the proposed method, and present results which illustrate a sharp reduction in the times to complete all coverage bins compared to the traditional test coverage method. Finally, we use a peripheral component interconnect express (PCIE) system as a case study to show the effectiveness of the proposed method in a real application. © 2013 IEEE.