Quantum error-correction (QEC) promises to scale-up quantum computation to practical relevance, but also demands significant capability from physical qubits and gates. Recent advances in qubit hardware, such as fast measurement and reset as well as increased gate fidelities, have enabled small error-correction experiments and put QEC theory to the test. Challenges remain, but also opportunities. For instance, because real devices do not necessarily have all the connectivity required for a theorist's favorite error-correcting code, we are led to novel codes and fault-tolerant circuitry. Because real noise is not idealized Pauli noise, we are led to novel attempts at calibrating a decoder to the actual noise in a device. This talk focuses on these and other opportunities for QEC on superconducting hardware at IBM. *We acknowledge support from IARPA under Contract No. W911NF-16-1-0114.