Engineering of superconducting quantum computers at utility-scale

Abstract

Scaling up superconducting qubit systems presents a number of challenges in many levels of hardware and software. In particular, I/O required (channel count, data size and bandwidth) for control of near-term quantum systems with 1,000’s of physical qubits requires careful design to present a system with acceptable characteristics to an end user. In this talk, I will focus primarily on scaling challenges outside of the cryogenic environment in terms of control hardware, system software, compilation, and service design. In particular, we will examine the requirements that emerge from modern error mitigation approaches [1,2] that demand execution of vast quantities of parameterized circuits for careful control of noise via Pauli twirling. I will show progress toward implementing systems capable of executing such workloads as well as challenges toward adapting this stack toward future fault-tolerant execution modes. [1] Ewout van den Berg, et al. arXiv:2201.09866 [2] Youngseok Kim, et al., Nature 618, p. 500–505 (2023)