CIRCUITSYNTH-RL: LLM-Based Circuit Topology Synthesis with RL Refinement

Analog circuit synthesis is crucial to Electronic Design Automation (EDA), automating the creation of circuit structures tailored to design requirements. Addressing challenges in the vast design space and constraint adherence, we propose CIRCUITSYNTH-RL, an RL-based framework in two phases: instruction tuning and RL refinement. Instruction tuning adapts LLMs to generate initial circuit topologies based on input constraints like component pool and efficiency. RL refinement uses reward models to align designs with constraints. Experiments show superior performance in generating compliant circuits and highlight the framework's ability to generalize to more complex configurations with limited training data.