First Experimental Demonstration of MRAM Data Scrubbing: 80 Mb MRAM with 40 nm junctions for Last Level Cache Applications
- H. Wu
- V. Katragadda
- et al.
- 2021
- IEDM 2021
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11 results for G. Lauer
Demonstration of narrow switching distributions in STT-MRAM arrays for LLC applications at 1x nm node
- E. R.J. Edwards
- Guohan Hu
- et al.
- 2020
- IEDM 2020
Spin-transfer torque MRAM with reliable 2 ns writing for last level cache applications
- Guohan Hu
- D. Kim
- et al.
- 2019
- IEDM 2019
Key parameters affecting STT-MRAM switching efficiency and improved device performance of 400°C-compatible p-MTJs
- Guohan Hu
- M. G. Gottwald
- et al.
- 2017
- IEDM 2017
STT-MRAM with double magnetic tunnel junctions
- Guohan Hu
- J.H. Lee
- et al.
- 2015
- IEDM 2015
Low-current spin transfer torque MRAM
- Guohan Hu
- J. J. Nowak
- et al.
- 2017
- VLSI-TSA 2017
Low-current Spin Transfer Torque MRAM
- Guohan Hu
- J. J. Nowak
- et al.
- 2017
- VLSI-DAT 2017
Low-current spin transfer torque MRAM
- D.C. Worledge
- A. Annunziata
- et al.
- 2015
- INTERMAG 2015
Bias dependent conductance in CoFeB-MgO-CoFeB magnetic tunnel junctions as an indicator for electrode magnetic condition at barrier interfaces
- Jonathan Z. Sun
- Philip Trouilloud
- et al.
- 2019
- AIP Advances
Dependence of Voltage and Size on Write Error Rates in Spin-Transfer Torque Magnetic Random-Access Memory
- J. J. Nowak
- Raphael P. Robertazzi
- et al.
- 2016
- IEEE Magnetics Letters