FDSOI CMOS with dielectrically-isolated back gates and 30nm LG high-κ/metal gate
- Marwan Khater
- J. Cai
- et al.
- 2010
- VLSI Technology 2010
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65 results for Michael Guillorn
High performance and highly uniform metal hi-k gate-all-around silicon nanowire mosfets
- Jeffrey W. Sleight
- Sarunya Bangsaruntip
- et al.
- 2010
- ECS Transactions
FinFET resistance mitigation through design and process optimization
- Cindy Wang
- Josephine Chang
- et al.
- 2009
- VLSI-TSA 2009
FinFET performance advantage at 22nm: An AC perspective
- M. Guillorn
- J. Chang
- et al.
- 2008
- VLSI Technology 2008
Effects of ultraviolet and vacuum ultraviolet synchrotron radiation on organic underlayers to modulate line-edge roughness of fine-pitch poly-silicon patterns
- Hiroyuki Miyazoe
- Sebastian U. Engelmann
- et al.
- 2017
- JVSTA
Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- IEEE Journal of Solid-State Circuits
Efficient AI System Design with Cross-Layer Approximate Computing
- Swagath Venkataramani
- Xiao Sun
- et al.
- 2020
- Proceedings of the IEEE
A Scalable Multi-TeraOPS Core for AI Training and Inference
- Sunil Shukla
- Bruce Fleischer
- et al.
- 2018
- IEEE SSC-L
Design technology co-optimization assessment for directed self-Assembly-based lithography: Design for directed self-Assembly or directed self-Assembly for design
- Kafai Lai
- Chi Chun Liu
- et al.
- 2017
- J. Micro/Nanolithogr. MEMS MOEMS
Fabrication of sub-20 nm nanopore arrays in membranes with embedded metal electrodes at wafer scales
- Jingwei Bai
- Deqiang Wang
- et al.
- 2014
- Nanoscale