A 56Gb/s burst-mode NRZ optical receiver with 6.8ns power-on and CDR-Lock time for adaptive optical links in 14nm FinFET CMOS
- Ilter Ozkaya
- Alessandro Cevrero
- et al.
- 2018
- ISSCC 2018
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85 results for Matthias Brändli
A 10b 1.5GS/s pipelined-SAR ADC with background second-stage common-mode regulation and offset calibration in 14nm CMOS FinFET
- Lukas Kull
- Danny Luu
- et al.
- 2017
- ISSCC 2017
A 64Gb/s 1.4pJ/b NRZ optical-receiver data-path in 14nm CMOS FinFET
- Alessandro Cevrero
- Ilter Ozkaya
- et al.
- 2017
- ISSCC 2017
A 30Gb/s 0.8pJ/b 14nm FinFET receiver data-path
- 2016
- ISSCC 2016
A 90GS/s 8b 667mW 64× interleaved SAR ADC in 32nm digital SOI CMOS
- Lukas Kull
- Thomas Toifl
- et al.
- 2014
- ISSCC 2014
A sub-ns response on-chip switched-capacitor DC-DC voltage regulator delivering 3.7W/mm2 at 90% efficiency using deep-trench capacitors in 32nm SOI CMOS
- Toke Meyer Andersen
- Florian Krismer
- et al.
- 2014
- ISSCC 2014
A 3.1mW 8b 1.2GS/s single-channel asynchronous SAR ADC with alternate comparators for enhanced speed in 32nm digital SOI CMOS
- Lukas Kull
- Thomas Toifl
- et al.
- 2013
- ISSCC 2013
A 14Gb/s high-swing thin-oxide device SST TX in 45nm CMOS SOI
- Christian Menolfi
- Thomas Toifl
- et al.
- 2011
- ISSCC 2011
A DAC-Based Discrete Multitone Wireline Transmitter in 5nm FinFET
- Seoyoung Jang
- Marcel Kossel
- et al.
- 2025
- ISSCC 2025
HERMES-Core-A 1.59-TOPS/mm2PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs
- Riduan Khaddam-Aljameh
- Milos Stanisavljevic
- et al.
- 2022
- IEEE JSSC