22 nm technology compatible fully functional 0.1 μm 2 6T-sram cell
- B. Haran
- A. Kumar
- et al.
- 2008
- IEDM 2008
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48 results for Scott D. Halle
A Novel Graded Antireflective Coating with Built-in Hardmask Properties Enabling 65nm and Below CMOS Device Patterning
- K. Babich
- N. Fukiage
- et al.
- 2003
- IEDM 2003
1.5-V single work-function W/WN/n+-poly gate CMOS device design with 110-nm buried-channel PMOS for 90-nm vertical-cell DRAM
- Rajesh Rengarajan
- Boyong He
- et al.
- 2002
- IEEE Electron Device Letters
Focus considerations of design pitches and absorber choice for EUV random logic
- Martin Burkhardt
- Zheng Chen
- et al.
- 2022
- OEN 2022
Predicting overlay mark performance based on process emulation and optical simulation
- Sagarika Mukesh
- Jack Wong
- et al.
- 2022
- SPIE Advanced Lithography 2022
Bayesian dropout approximation in deep learning neural networks: Analysis of self-aligned quadruple patterning
- Scott D. Halle
- Max O. Bloomfield
- et al.
- 2020
- SPIE Advanced Lithography 2020
Detection of printable EUV mask absorber defects and defect adders by full chip optical inspection of EUV patterned wafers
- Luciana Meli
- Scott D. Halle
- et al.
- 2016
- ASMC 2016
Assessments of image-based and scatterometry-based overlay targets
- Chiew-Seng Koay
- Nelson Felix
- et al.
- 2016
- SPIE Advanced Lithography 2016
EUV photomask defects: What prints, what doesn't, and what is required for HVM
- Jed Rankin
- Zhengqing John Qi
- et al.
- 2015
- SPIE Photomask Technology + EUV Lithography 2015
Toward defect guard-banding of EUV exposures by full chip optical wafer inspection of EUV mask defect adders
- Scott D. Halle
- Luciana Meli
- et al.
- 2015
- SPIE Advanced Lithography 2015