POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth
- Eric J. Fluhr
- Joshua Friedrich
- et al.
- 2014
- ISSCC 2014
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43 results for Kevin G. Stawiasz
A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS
- Masood Qazi
- Kevin Stawiasz
- et al.
- 2010
- ISSCC 2010
Fluctuation limits & scaling opportunities for CMOS SRAM cells
- Azeez Bhavnagarwala
- Stephen Kosonocky
- et al.
- 2005
- IEDM 2005
3.3 V 20-channel 500 Mb/s/ch optical receiver with integrated optical detectors in 1.2 mm GaAs
- J. Yang
- Joong-ho Choi
- et al.
- 1998
- ISSCC 1998
Automated testing methodologies for low cost, parallel optical bus components
- K. Stawiasz
- D. Kuchta
- et al.
- 1997
- ECTC 1997
500 Mb/s, 20-channel CMOS laser diode array driver for a parallel optical bus
- Peter Xiao
- D. Kuchta
- et al.
- 1997
- ISSCC 1997
Jitney parallel optical interconnect
- J.D. Crow
- Joong-ho Choi
- et al.
- 1996
- ECTC 1996
The 12-core POWER8™ processor with 7.6 Tb/s IO bandwidth, integrated voltage regulation, and resonant clocking
- Eric J. Fluhr
- Steve Baumgartner
- et al.
- 2015
- IEEE JSSC
Analyzing path delays for accelerated testing of logic chips
- Emily Ray
- Barry P. Linder
- et al.
- 2015
- IRPS 2015
SOI FinFET soft error upset susceptibility and analysis
- Phil Oldiges
- Ken Rodbell
- et al.
- 2015
- IRPS 2015