Improved Air Spacer Co-Integrated with Self-Aligned Contact (SAC) and Contact over Active Gate (COAG) for Highly Scaled CMOS Technology
- Kangguo Cheng
- Chanro Park
- et al.
- 2020
- VLSI Technology 2020
Conference paper
Publications
46 results for Tenko Yamashita
Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- J. Zhang
- S. Pancharatnam
- et al.
- 2019
- IEDM 2019
Conference paperImaging, Modeling and Engineering of Strain in Gate-All-Around Nanosheet Transitors
- S. Reboh
- V. Boureau
- et al.
- 2019
- IEDM 2019
Conference paperDirect Partition Measurement of Parasitic Resistance Components in Advanced Transistor Architectures
- Zuoguang Liu
- Heng Wu
- et al.
- 2019
- VLSI Technology 2019
Conference paperBias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor
- Miaomiao Wang
- Jingyun Zhang
- et al.
- 2019
- IRPS 2019
Conference paperParasitic Resistance Reduction Strategies for Advanced CMOS FinFETs beyond 7nm
- Heng Wu
- Oleg Gluschenkov
- et al.
- 2018
- IEDM 2018
Conference paperTechnique for Asymmetric Source/Drain Resistance Extraction on a Single Gate Length MOSFET
- Phil Oldiges
- Chen Zhang
- et al.
- 2018
- SISPAD 2018
Conference paperFinFET external resistance analysis by extended shift-and-ratio method
- Chen Zhang
- Zuoguang Liu
- et al.
- 2018
- IEEE T-ED
PaperChannel Geometry Impact and Narrow Sheet Effect of Stacked Nanosheet
- Chun Wing Yeung
- Jingyun Zhang
- et al.
- 2018
- IEDM 2018
Conference paperStrain, stress, and mechanical relaxation in fin-patterned Si/SiGe multilayers for sub-7 nm nanosheet gate-all-around device technology
- S. Reboh
- R. Coquand
- et al.
- 2018
- Applied Physics Letters
Paper