Publication
IEDM 2019
Conference paper

Imaging, Modeling and Engineering of Strain in Gate-All-Around Nanosheet Transitors

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Abstract

We combine advanced transmission electron microscopy (TEM) and numerical models to draw the evolution of strains over the integration of horizontally stacked Gate-All-Around Nanosheet transistors (GAANS). In particular, we measured compressive strains of -0.5% to -1% after channel release in transistors at 10 nm design rule. With support on model calculations, we speculate that the effect is related to a compressive inter-layer dielectric (ILD). As another method to manipulate channel stresses, in a specifically designed GAANS we demonstrate a transition from compressive to tensile strain introduced by a gate stack/contact test modules. Finally, a demonstration of GAANS Si-channel cladded with SiGe opens a way for the co-integration of compressive SiGe channels with limited modification of the integration flow. The findings provide insights and guidelines for strain engineering in GAANS.

Date

01 Dec 2019

Publication

IEDM 2019

Authors

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