65nm CMOS technology for low power applications
- A. Steegen
- R. Mo
- et al.
- 2005
- IEDM 2005
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10 results for Y.-H. Lin
High performance and low power transistors integrated in 65nm bulk CMOS technology
- Z. Luo
- A. Steegen
- et al.
- 2004
- IEDM 2004
Non-poisoning dual damascene patterning scheme for low-k and ultra low-k BEOL
- W. Cote
- D. Edelstein
- et al.
- 2006
- ADMETA 2006
Silicon containing polymer in applications for 193 nm high NA lithography processes
- Scan Bums
- Dirk Pfeiffer
- et al.
- 2006
- SPIE Advanced Lithography 2006
A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applications
- Matthew Angyal
- Jason Gill
- et al.
- 2005
- AMC 2005
Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH technology
- D. Edelstein
- C.R. Davis
- et al.
- 2004
- IITC 2004
90 nm SiCOH technology in 300 mm manufacturing
- L. Clevenger
- M. Yoon
- et al.
- 2004
- ADMETA 2004
Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL
- D. Edelstein
- H.S. Rathore
- et al.
- 2004
- IRPS 2004
Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL
- D. Edelstein
- H.S. Rathore
- et al.
- 2004
- IRPS 2004
A 90nm dual damascene hybrid (organic / inorganic) low-k - Copper BEOL integration scheme
- T. Dalton
- A. Cowley
- et al.
- 2003
- ADMETA 2003