Publication
HPCC/SmartCity/DSS 2013
Conference paper

VBIW: Optimizing indirect branch in dynamic binary translation

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Abstract

A major challenge of Dynamic Binary Translation (DBT) is to efficiently handle the indirect branch. Conventionally, to translate indirect branches (IBs), DBT systems need to conduct address mapping between Source Binary Blocks (SBB) and Translated Binary Blocks (TBB). However, even a dedicated address mapping process still results in non-trivial performance overheads to DBT. This paper first provides exhaustive analysis of the overheads of address mapping, and finds that hash lookup, context switching and consistency maintenance are three main sources of overheads. To address these overheads, we further propose a novel approach called Virtual Branch Instruction Write-back (VBIW). The key idea is to dynamically write a Virtual Branch Instruction (VBI) into the SBB once the mapping is determined. Since the VBI contains the target TBB address of a branch, the costly address mapping can be eliminated for further reference of the same branch. In addition to theoretical analysis of VBIW, we also implement VBIW on a X86 to MIPS DBT system of Godson-3. The experimental results show that VBIW can reduce DBT execution time by 29.5% on average (ranging from 1.8% to 58.5%) for single threaded benchmarks, and by 19.6% on average (4.5% to 62.5%) for multithreaded benchmarks. © 2013 IEEE.

Date

13 Nov 2013

Publication

HPCC/SmartCity/DSS 2013

Authors

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