Publication
IEEE Design and Test of Computers
Paper

The V compiler: Automating automating hardware design

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Abstract

The V language describes VLSI systems concisely through the use of sequential algorithmic descriptions. Because V includes high-level constructs such as queues, asynchronous calls, and cycle-blocks, designs are more readily described and optimized into efficient hardware implementations. The implementation can then be tuned for space, time, or other objectives using annotations. From the input description, the V compiler generates both a register-transfer-level specification and a software simulator. Thus, a single description is suitable for both functional simulation and input to logic synthesis. © 1989 IEEE

Date

01 Jan 1989

Publication

IEEE Design and Test of Computers

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