Frank Liu, Chandramouli Kashyap, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Buffer insertion is essential for achieving timing closure. This work studies buffer insertion under two types of constraints: (i) avoiding blockages, and (ii) inserting buffers into pre-determined buffer bay regions. We propose a general Steiner tree routing problem to drive this application and present a maze-routing based heuristic. We show that this approach leads to useful solutions on industry designs.
Frank Liu, Chandramouli Kashyap, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
He Zhou, Sunil P. Khatri, et al.
ASP-DAC 2020
C.N. Sze, Charles J. Alpert, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
He Zhou, Sunil P. Khatri, et al.
DAC 2019