Ganesh Venkataraman, Jiang Hu, et al.
IEEE Transactions on VLSI Systems
Buffer insertion is essential for achieving timing closure. This work studies buffer insertion under two types of constraints: (i) avoiding blockages, and (ii) inserting buffers into pre-determined buffer bay regions. We propose a general Steiner tree routing problem to drive this application and present a maze-routing based heuristic. We show that this approach leads to useful solutions on industry designs.
Ganesh Venkataraman, Jiang Hu, et al.
IEEE Transactions on VLSI Systems
Rongjian Liang, Hua Xiang, et al.
IEEE TCADIS
Haoxing Ren, David Z. Pan, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Shiyan Hu, Charles J. Alpert, et al.
DAC 2006