ISCAS 2013
Conference paper

SRAM device and cell co-design considerations in a 14nm SOI FinFET technology

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We report a systematic study on the impact of process and statistical variability on SRAM design in a 14nm SOI FinFET technology node. A comprehensive statistical compact modelling strategy is developed for the early delivery of reliable PDK model, which enables TCAD-based transistor-cell co-design and path finding during the early phase of a technology node. © 2013 IEEE.