Scalable SDH/SONET framer architecture for DATACOM and TELCO applications

Abstract

This paper presents the architectural concepts behind a versatile VLSI device that maps ATM, IP, and/or traditional T1/T3 traffic streams into SONET/SDH transport signals ranging from OC-1 to OC-48/STM-16. Additional key features for effective system integration are on-chip support for add-drop multiplex, digital cross-connect, and automatic protection switching functions. A road-map discussing the applicability of the developed concepts for next-generation framers up to OC-192/STM-64 is also presented.