Amnon Joseph, Ron Y. Pinter
Integration, the VLSI Journal
Chaining is the ability to pipeline two or more vector instructions on Cray-1 like machines. We show how to optimally use this feature to compute (vector) expression trees in the context of automatic code generation. We present a linear time scheduling algorithm for finding an optimal order of evaluation for a machine with a bounded number of registers. © 1988 IEEE
Amnon Joseph, Ron Y. Pinter
Integration, the VLSI Journal
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COOTS 1996
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