On performance and efficiency of VLIW and superscalar

Abstract

Instruction-level parallelism in non-numerical code is characterized as leading to small speedup (as little as two) due to its irregularity. Recently, we have developed a new static scheduling algorithm called selecttve scheduling which can be used as a component oj VLIW and superscalar compilers to exploit the irregular parallelism. This paper performs a comprehensive empirical study based on the selective scheduling compiler to examine performance/efficiency of statically scheduled machines, and to estimate the scheduling overhead. The results indicate that a logarithmic speedup increase up to five-fold is achievable on realistic resources without resorting to branch probability.