Measurement considerations for future high speed computer packaging

Abstract

The decrease in the cycle times of computers has resulted from improvements in the performance of the active circuits and the passive structures on which these circuits are packaged. In this paper we first summarize the state of the art in high-performance computer packaging. Estimates of future requirements for package interconnection structures are then described along with a few measurement techniques that can be used to characterize their electrical properties. High-speed measurements on an experimental thin-film transmission line structure obtained using three of these techniques are presented to illustrate the different measurement considerations.