A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
The fabrication of integrated complementary metal-oxide-semiconductor devices and circuits that scale into the sub-100nm regime is presented. While the devices are essentially conventional in design, significant innovations have been required to build them. These innovations combine new materials, lithography, etching, and processing technologies. Moreover, theoretical models of novel devices, such as the double gate transistor, suggest that metal-oxide-semiconductor field-effect transistors may be scaled down to gate lengths of 30nm.
A. Gupta, R. Gross, et al.
SPIE Advances in Semiconductors and Superconductors 1990
H.D. Dulman, R.H. Pantell, et al.
Physical Review B
Imran Nasim, Melanie Weber
SCML 2024
Michiel Sprik
Journal of Physics Condensed Matter