IDL is a hardware design language in use in the VLSI environment. It incorporates a significant number of high-level features such as groups, subroutines, and labels and is particularly well adapted to dealing with parallelism at the hardware level. In addition to being human intelligible (and therefore appropriate as a documentation medium), IDL code can be used to generate 2-level logic which, under the IDL system, can be manipulated in a number of ways, including product term factoring and minimization, feedback minimization, partitioning, merging, and verification. The IDL system contains several simulators that are driven by IDL code. The most common embodiment of IDL output in hardware is a PLA.