J.A. Kash, C.W. Baks, et al.
LEOS 2003
A complementary metal-oxide-semiconductor (CMOS) monolithically integrated photoreceiver is presented. The circuit was fabricated in a 130-nm unmodified CMOS process flow on 2-μm-thick silicon-on-insulator substrates. The receiver operated at 8 Gb/s with 2-dBm average input optical power and a bit error rate of less than 10-9. The integrated lateral p-i-n photodetector was simultaneously realized with the amplifier and had a responsivity of 0.07 A/W at 850 nm. The measured receiver sensitivities at 5, 3.125, 2, and 1 Gb/s, were -10.9, -15.4, -16.5, and -19 dBm, respectively. A 3-V single-supply operation was possible at bit rates up to 3.125 Gb/s. The transimpedance gain of the receivers was in the range 53.4-31 dBΩ. The circuit dissipated total power between 10 mW and 35 mW, depending on the design.
J.A. Kash, C.W. Baks, et al.
LEOS 2003
P. Pepeljugoski, J. Schaub, et al.
OFC 2002
J. Schaub, D. Kuchta, et al.
OFC 2001
B. Yang, J. Schaub, et al.
LEOS 2002